AO4409 30v p-channel mosfet general description product summary v ds i d (at v gs =-10v) -15a r ds(on) (at v gs =-10v) < 7.5m w r ds(on) (at v gs =-4.5v) < 12m w 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl 2 t a =70c junction and storage temperature range -55 to 150 c thermal characteristics units parameter typ max c/w r q ja 31 59 40 v 20 gate-source voltage drain-source voltage -30 the AO4409 uses advanced trench technology to provi de excellent r ds(on) , and ultra-low low gate charge. this device is suitable for use as a load switch or in p wm applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted -30v a i d -15 -12.8 -80 t a =25c t a =70c power dissipation b p d pulsed drain current c continuous drain current t a =25c avalanche current c w 3.1 maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 16 75 24 maximum junction-to-ambient a 30 a avalanche energy l=0.3mh c 135 mj g ds soic-8 top view bottom view d d d d s s s g rev 7: feb. 2011 www.aosmd.com page 1 of 5
AO4409 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -5 t j =55c -25 i gss 100 na v gs(th) gate threshold voltage -1.4 -1.9 -2.7 v i d(on) -80 a 6.2 7.5 t j =125c 8.2 11.5 9.5 12 m w g fs 35 50 s v sd -0.71 -1 v i s -5 a c iss 5270 6400 pf c oss 945 pf c rss 745 pf r g 2 3 w q g (10v) 100 120 nc q g (4.5v) 51.5 nc q gs 14.5 nc q gd 23 nc t d(on) 14 ns t r 16.5 ns t d(off) 76.5 ns t f 37.5 ns t rr 36.7 45 ns q rr 28 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =-15a, di/dt=100a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =1 w , r gen =3 w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =-10v, v ds =-15v, i d =-15a gate source charge gate drain charge total gate charge m w i s =-1a,v gs =0v v ds =-5v, i d =-15a v gs =-4.5v, i d =-10a forward transconductance diode forward voltage r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =-250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-15a reverse transfer capacitance i f =-15a, di/dt=100a/ m s v gs =0v, v ds =-15v, f=1mhz switching parameters a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initialt j =25c. d. the r q ja is the sum of the thermal impedence from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150c. the soa curve provides a single pulse ratin g. rev 7: feb. 2011 www.aosmd.com page 2 of 5
AO4409 typical electrical and thermal characteristics 17 52 10 0 18 40 0 10 20 30 40 50 60 0 0.5 1 1.5 2 2.5 3 3.5 4 -v gs (volts) figure 2: transfer characteristics (note e) -i d (a) 2 4 6 8 10 12 0 5 10 15 20 25 -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -v sd (volts) figure 6: body-diode characteristics (note e) -i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =-4.5v v gs =-10v i d =-15a 0 5 10 15 20 2 4 6 8 10 -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =-5v v gs =-4.5v v gs =-10v i d =-15a 25c 125c 0 10 20 30 40 50 60 0 1 2 3 4 5 -v ds (volts) fig 1: on-region characteristics (note e) -i d (a) v gs =-3v -3.5v -4.5v -6v -10v -4v rev 7: feb. 2011 www.aosmd.com page 3 of 5
AO4409 typical electrical and thermal characteristics 0 2 4 6 8 10 0 20 40 60 80 100 120 q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 1000 2000 3000 4000 5000 6000 7000 8000 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss c oss c rss v ds =-15v i d =-15a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) power (w) t a =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150c t a =25c 100 m s 10ms 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =75c/w rev 7: feb. 2011 www.aosmd.com page 4 of 5
AO4409 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) rev 7: feb. 2011 www.aosmd.com page 5 of 5
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